April 25, 200916 yr xor eax,eax is 2 bytes, while mov eax,0 is 5.So it is a space thing. Edited April 25, 200916 yr by high6
April 25, 200916 yr Author Thank you for the answer.xor eax,eax is 2 bytes, while mov eax,0 is 5.So it is a space thing.
April 25, 200916 yr To slightly clarify. xor r32, r32 Is preferred because it only takes 2 bytes and 1 clock cycle. Whereas: mov r32, imm Takes 5 bytes and 2 clock cycle's + i(1, 2)... Overall it's an optimization thing . KOrUPt. Edited April 25, 200916 yr by KOrUPt
April 25, 200916 yr Yea, something similar is the following one. Let's say you want to move 1 to EAX. The immediate instruction is this: B8 01000000 MOV EAX,1 However, many compilers use this instead: 6A 01 PUSH 158 POP EAX As you see clearly, the last one uses only three bytes... just optimizing code. Cheers Nacho_dj
April 25, 200916 yr isntpush 1pop eaxpretty dumb if you can doxor eax, eaxinc eaxsame bytes, no memory access.ive seen it before too but always wondered what's the point (besides perhaps increasing readability)
April 25, 200916 yr yeah I always use xor eax,eax inc eax..In WL API jumps it leaves rome for a ret 04 or 0c. And you can fit it all into the same space as a jmp xxxxxxxx.
April 25, 200916 yr (besides perhaps increasing readability) As you surely know, this is not always the reason, since there are times you find a more complicated asm code than the sources themselves... Think that compilation is a mechanical process that sometimes 'mix' instructions loosing the logical order, providing you a strange code... But yes, I agree, yours is still better solution, "imagination is power" Cheers Nacho_dj
June 1, 200916 yr Another trick is to subtract a register from itself therefore always having 0 as the result; just like 'xor eax, eax', it is two bytes;00401000 2BC0 SUB EAX,EAX
June 1, 200916 yr Another trick is to subtract a register from itself therefore always having 0 as the result; just like 'xor eax, eax', it is two bytes;00401000 2BC0 SUB EAX,EAXWhat about if the value stored at EAX is a negative?
June 15, 200916 yr Take note of the flags, people. These instructions are used in app code, and if checks are made (not necessarily on EAX) later on, flags are fuxxed (with using XOR for instance) ;-)
June 15, 200916 yr xor eax, eaxinc eaxis a bad idea, no memory access but it probably yields an AGI and is thus slower
June 15, 200916 yr first read intel documentation,since pentium zeroing operation before usage doesnt cause stall. and agi is adress generation not pipeline stall.
June 17, 200916 yr first read intel documentation,since pentium zeroing operation before usage doesnt cause stall. and agi is adress generation not pipeline stall.Ye i tend to say agi when i mean stallnevertheless, it's 2 cycles or not?
June 17, 200916 yr its shouldnt be 2 cycles only 1, but i always use pentium u v pipelines optimizations. still as i can see now with core 2 duo aligment is more important, using mov ax,[] or non pairable movzx eax,[]gives result that movzx is faster due we change aligment of later code.
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